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  WM8733 102db stereo dac product preview, july 2000, rev 1.3 wolfson microelectronics ltd . lutton court, bernard terrace, edinburgh, eh8 9nx, uk tel: +44 (0) 131 667 9386 fax: +44 (0) 131 667 5176 email: sales@wolfson.co.uk http://www.wolfson.co.uk product preview data sheets contain specifications for products in the formative phase of development. these products may be changed or discontinued without notice. ? 2000 wolfson microelectronics ltd . description WM8733 is a high performance stereo dac designed for use in portable audio equipment, video cd players and similar applications. it comprises selectable normal or i 2 s compatible serial data interfaces for 16 to 24-bit inputs, high performance digital filters, and sigma-delta output dacs, achieving an 102db signal-to-noise ratio. the device is available in a 14-pin soic package that offers selectable mute and de-emphasis functions using a minimum of external components. low supply voltage operation and low current consumption are valuable features, particularly for use in portable equipment. additional modes consist of a powerdown option and the possibility of generating separate differential left and right outputs for applications demanding higher performance. features ? high tolerance to clock jitter ? compatible with pcm1733 ? distortion > 90db, snr > 102db, dynamic range performance > 100db ? stereo dac with input sampling from 8khz to 96khz ? additional mute feature and high performance differential modes ? normal or i 2 s compatible data format ? sigma-delta design with 64x oversampling ? system clock 256fs or 384fs or 512fs ? supply range 3v to 5v ? analogue voltage output to drive 2k ? load ? 14-pin soic package applications ? high performance consumer audio block diagram (5) cap digital sigma-delta modulator digital sigma-delta modulator lrcin (1) digital gnd digital vdd sel[1] (11) infinite zero detect 10k wired or sel[0] 0 0 1 1 sel[1] 0 1 0 1 mode normal stereo power down left only differential output right only differential output sel[0] (4) serial interface digital filters (12) deemph (10) mute switched capacitor dac switched capacitor dac (8) vdd (7) gnd (9) voutl (6) voutr bckin (3) format (13) scki (14) din (2) WM8733
WM8733 product preview wolfson microelectronics ltd pp rev 1.3 july 2000 2 ordering information device temp. range package xWM8733ed -25 to +85 o c 14-pin soic pin configuration 10 9 8 14 13 12 11 WM8733 5 6 7 1 2 3 4 vdd voutl mute sel1 deemph scki format gnd voutr cap sel0 bckin lrcin din absolute maximum ratings absolute maximum ratings are stress ratings only. permanent damage to the device may be caused by continuously operating at or beyond these limits. device functional operating limits and guaranteed performance specifications are given under electri cal characteristics at the test conditions specified esd sensitive device. this device is manufactured on a cmos process. it is therefore generically susceptible to damage from excessive static voltages. proper esd precautions must be taken during handling and storage of this device. condition min max supply voltage -0.3v +7.0v reference input vdd+0.3v operating temperature range, t a -25 o c+85 o c storage temperature -65 o c +150 o c lead temperature (soldering, 10 seconds) +260 o c lead temperature (soldering, 2 minutes) +183 o c recommended operating conditions parameter symbol test conditions min typ max unit supply range vdd -10% 3.0 to 5.0 +10% v ground gnd 0 v supply current vdd = 5v 15 ma
product preview WM8733 wolfson microelectronics ltd pp rev 1.3 july 2000 3 electrical characteristics test characteristics vdd = 5v, gnd = 0v, t a = +25 o c, fs = 44.1khz, scki = 384fs unless otherwise stated. parameter symbol test conditions min typ max unit digital logic levels input low level v il 0.8 v input high level v ih 2.0 v analogue output levels output level into 10kohm, full scale 0db, (5v supply) 1v rms into 10kohm, full scale 0db, (3v supply) 0.6 v rms o midrail or ac coupled (5v supply) 2 10 kohms minimum resistance load o midrail or ac coupled (3v supply) 10 kohms maximum capacitance load 5v or 3v 100 pf output dc level vdd/2 v reference levels potential divider resistance vdd to cap and cap to gnd 80 100 120 kohms voltage at cap vdd/2 dac circuit specifications snr (note 1) stereo mode 98 102 db mono mode vdd = 5v db stereo mode 96 100 db mono mode vdd = 3v db thd (full scale) 0db 0.03 0.01 % thd+n -60db -35 -40 db frequency response 0 20,000 hz pass band ripple 0.25 db transition band 20,000 hz out of band rejection -40 db stereo mode 100 db dynamic range mono mode db channel separation 90 db gain mismatch channel-to-channel 1 5 %fsr audio data input and system clock timing information bckin pulse cycle time t bcy 100 ns bckin pulse width high t bch 50 ns bckin pulse width low t bcl 50 ns bckin rising edge to lrcin edge t bl 30 ns lrcin rising edge to bckin rising edge t lb 30 ns din setup time t ds 30 ns din hold time t dh 30 ns system clock pulse width high t sckih 13 ns system clock pulse width low t sckil 13 ns note 1 ratio of rms output level with 1khz full scale input, to the rms output level with all zeros into the digital input, meas ured ?a? weighted over a 20hz to 20khz bandwidth. note 2 all performance measurements done with 20khz low pass filter. failure to use such a filter will result in higher thd+n and lower snr and dynamic range readings than are found in the electrical characteristics. the low pass filter removes out of band noise; although it is not audible it may affect dynamic specification values.
WM8733 product preview wolfson microelectronics ltd pp rev 1.3 july 2000 4 pin description pin name type description 1 lrcin digital input sample rate clock input 2 din digital input serial data input 3 bckin digital input bit clock input 4 sel0 digital input mode select (internal pull-down) 5 cap analogue output analogue internal reference 6 voutr analogue output right channel dac output 7 gnd supply 0v supply 8 vdd supply positive supply 9 voutl analogue output left channel dac output 10 mute digital input soft mute control; high = muted, z = auto mute input/output 11 sel1 digital input mode select (internal pull-down) 12 deemph digital input de-emphasis select; high = de-emphasis on (44.1khz only), (internal pull-up) 13 format digital input data input format select; ? lo ? = normal, ? hi ? = i 2 s (internal pull-up) 14 scki digital input system clock input (256fs or 384fs or 512fs)
product preview WM8733 wolfson microelectronics ltd pp rev 1.3 july 2000 5 device description introduction WM8733 is a complete high performance stereo audio 18-bit digital-to-analogue converter, including digital interpolation filter, multibit sigma-delta with dither, and switched capacitor multibit stereo dac and output smoothing filters. special functions of soft mute and de-emphasis are provided, and operation using system clock of 256fs, or 384fs or 512fs is provided, selection between either clock rate being automatically controlled. sample rates (fs) from less than 8ks/s to 96ks/s are allowed, provided the appropriate system clock is input. an auto mute function is provided which is enabled if mute (pin 10) is left at high impedance. if 64 successive left and right channel data samples of value 0 are received, auto mute is achieved. this signal is wire ored to mute (pin 10) via 10k resistor. if mute (pin 10) internally is not externally driven, the internal auto mute state is visible on this pin as a weak drive strength signal (10k ? source). mute description 0 z 1 soft mute is off auto mute is enabled soft mute is on table 1 soft mute control a novel multi bit sigma-delta dac design is used, utilising a 64x oversampling rate, to optimise signal to noise performance and offer increased clock jitter tolerance. internally generated midrail references are used to dc bias output signals, requiring only a single external capacitor for decoupling purposes. the device is packaged in a small 14-pin soic package, offering pin compatibility with burr brown pcm1733, but with added functionality of a soft mute input pin, which may be left floating to enable auto mute detection, or held ? low ? leaving the device operational. single 3v to 5v supplies may be used, the output amplitude scaling with absolute supply level. low supply voltage operation and low current consumption, and the low pin count small package, make the WM8733 attractive for many consumer type applications.
WM8733 product preview wolfson microelectronics ltd pp rev 1.3 july 2000 6 dac circuits the WM8733 dacs are designed to allow playback of 18-bit pcm audio or similar data with high resolution and low noise and distortion. sample rates up to 96ks/s may be used, with much lower sample rates acceptable provided that the ratio of sample rate (lrcin) to system clock is maintained at the required 256fs, or 384fs or 512fs times. the dacs on WM8733 are implemented using sigma-delta oversampled conversion techniques. these require that the pcm samples are digitally filtered and interpolated to generate a set of samples at a much higher rate than the input rate. this sample stream is then digitally modulated to generate a digital pulse stream that is then converted to analogue signals in a switched capacitor dac. the advantage of this technique is that the dac is linearised using noise shaping techniques, allowing the 16-bit resolution to be met using non-critical analogue components. a further advantage is that the high sample rate at the dac output means that smoothing filters on the output of the dac need only have fairly crude characteristics in order to remove the characteristic steps, or images, on the output of the dac. in order to ensure that generation of tones characteristic to sigma-delta convertors is not a problem, dithering is used in the digital modulator, and a higher order modulator is used. the switched capacitor technique used in the dac reduces sensitivity to clock jitter compared to switched current techniques used in other implementations. de-emphasis of 44.1khz signals may be applied if required. deemph description 0 de-emphasis is off 1 de-emphasis is on (44.1khz only) table 2 de-emphasis control the voltage on the cap pin is used as the reference for the dacs, therefore the amplitude of the signals at the dac outputs will scale with the amplitude of the voltage at the cap. an external reference could be used to drive in on the cap pin if desired, but a value typically of about midrail should be used for optimum performance. the outputs of the 2 dacs are buffered out of the device by buffer amplifiers. these amplifiers will source load current of several ma and sink current up to 1.5ma, so allowing significant loads to be driven. the output source is active, the sink is class a, i.e. fixed value, so greater loads might be driven if an external ? pull-down ? resistor is connected at the output. typically an external low pass filter circuit will be used to remove residual sampling noise of the 64x oversampling used and if desired adjust the signal amplitude and device strength.
product preview WM8733 wolfson microelectronics ltd pp rev 1.3 july 2000 7 serial data interface WM8733 has serial interface formats that are fully compatible with both normal (msb first, right- justified) and i 2 s interfaces. the data format is selected with the format pin. when format is low, normal data format is selected. when the format is high, i 2 s format is selected. if the application demands 16-bit or 20-bit data, then i 2 s format may be used. two lsbs will be lost in 20-bit mode. normal mode will support 18-bit data applications or 16-bit packed mode applications (automatically detected). note: in 16-bit ? packed ? mode operation (exactly 32 blcks per lrcin period) the data word must align exactly with lrcin clock edges (effectively both left and right justified at the same time). format description 0 1 normal format (msb-first, right justified) i 2 s format (philips serial data protocol) table 3 serial interface formats msb msb lsb lsb left channel right channel lrcin bckin din audio data word = 18-bit 1/fs 1 2 3 161718 1 2 3 16 17 18 figure 1 ?normal? data input timing msb msb lsb lsb left channel right channel lrcin bckin din audio data word = 18-bit 1/fs 123 1617 18 123 1617 18 figure 2 i 2 s data input timing
WM8733 product preview wolfson microelectronics ltd pp rev 1.3 july 2000 8 msb msb lsb lsb left channel right channel lrcin bckin din audio data word = 16-bit 1/fs 14 15 16 123 1 14 15 16 123 15 16 figure 3 16-bit normal packed mode msb msb lsb lsb left channel right channel lrcin bckin din audio data word = 18-bit 1/fs 16 17 18 123 1 16 17 18 123 17 18 figure 4 18-bit normal packed mode mode select pins the WM8733 has four possible modes. sel0 sel1 mode 0 0 1 1 0 1 0 1 normal stereo operation power down left only differential output right only differential output table 4 mode select pins the sel0/1 pins (pins 4 and 11) can be hard wired, or left floating as internal ? pull-downs ? will cause the device to operate in normal stereo mode.
product preview WM8733 wolfson microelectronics ltd pp rev 1.3 july 2000 9 system clock the system clock is used to operate the digital filters and the noise shaping circuits. the system clock input is at pin 14 (scki). the frequency of WM8733 ? s system clock should be set to 256fs or 384fs or 512fs, (where fs is the audio sampling frequency). the sample rate is typically: 32 khz, 44.1 khz, 48 khz or 96khz. WM8733 has a system clock detection circuit that automatically determines whether the system clock being supplied is at 256fs or 384fs or 512fs. the system clock should be synchronised with lrcin, but WM8733 is tolerant of phase differences. severe distortion in the phase difference between lrcin and the system clock will be detected, and cause the device to automatically resynchronise. during resynchronisation, the output of the device will either repeat the previous sample, or drop the next sample, depending on the nature of the phase slip. this will ensure minimal ? click ? at the analog outputs during resynchronisation. t sckih t sckil scki figure 5 system clock timing requirements system clock frequency (mhz) sampling rate (lrcin) 256fs 384fs 512fs 32 khz 8.192 12.288 16.384 44.1 khz 11.2896 16.9340 22.5792 48 khz 12.288 18.432 24.576 96khz 24.576 36.864 49.152 table 5 system clock frequencies versus sampling rate lrcin bckin din t bch t bcl t lb t bl t bcy t ds t dh figure 6 audio data input timing
WM8733 product preview wolfson microelectronics ltd pp rev 1.3 july 2000 10 recommended external components gnd voutr cap vdd sel0 bckin lrcin din 5 6 7 1 2 3 4 10 9 8 14 13 12 11 voutl mute sel1 deemph scki format WM8733 gnd vdd analogue output for right channel from audio processor analogue output for left channel 256fs/384fs/512fs clk 10 f 0.1f 10f + external lpf external lpf (diode allows automute operation) figure 5 applications diagram detail of application diagram showing the external low power filter x2 for stereo operation 100pf - + 10k ? 1500pf 10k ? 680pf 10k ? - + vin filtered analogue output external lpf figure 6 third-order low pass filter (lpf) example an external low pass filter is recommended if the device is driving a wide band amplifier, as shown in figure 6. in some applications, second-order or passive rc filter may be adequate.
product preview WM8733 wolfson microelectronics ltd pp rev 1.3 july 2000 11 package dimensions notes: a. all linear dimensions are in millimeters (inches). b. this drawing is subject to change without notice. c. body dimensions do not include mold flash or protrusion, not to exceed 0.25mm (0.010in). d. meets jedec.95 ms-012, variation = ab. refer to this specification for further details. symbols dimensions (mm) dimensions (inches) min max min max a 1.35 1.75 0.0532 0.0688 a1 0.10 0.25 0.0040 0.0098 b 0.33 0.51 0.0130 0.0200 c 0.19 0.25 0.0075 0.0098 d 8.55 8.75 0.3367 0.3444 e 3.80 4.00 0.1497 0.1574 e 1.27 bsc 0.05 bsc h 5.80 6.20 0.2284 0.2440 h 0.25 0.50 0.0099 0.0196 l 0.40 1.27 0.0160 0.0500 0 o 8 o 0 o 8 o ref: jedec.95, ms-012 0.10 (0.004) seating plane dm001.c e d: 14 pin soic 3.9mm wide body h b d a a1 c h x 45 o -c- 8 7 1 14 l e


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